Implementation of the Viterbi decoder in FPGA

Abstract

It is well known that data transmissions over wireless channels are affected by attenuation, distortion, interference and noise, which affect the receiver’s capacity to receive correct information. Convolutional encoding with Viterbi decodingis a powerful method for forward error correction. It hasbeen widely deployed in many wireless communicationsystems to improve the limited capacity of thecommunication channels. In this article, we present a SpartanXC3S400A field-programmable gate array implementationof Viterbi Decoder with a constraint length of 3 and a coderate of 1/2. The Viterbi Decoder is compatible with manycommon standards, such as DVB, 3GPP2, 3GPP LTE, IEEE802.16, Hiperlan, and Intelsat IESS-308/309.